SI7960DP-T1-GE3

Manufacturer :

Vishay

Product Category :

Transistors - FETs, MOSFETs - Arrays

Gate to Source Voltage (Vgs) :

20V

Number of Terminations :

6

FET Technology :

METAL-OXIDE SEMICONDUCTOR

Terminal Form :

C BEND

Length :

4.9mm

Packaging :

Tape and Reel (TR)

Element Configuration :

Dual

JESD-30 Code :

R-XDSO-C6

RoHS Status :

ROHS3 Compliant

Published :

2015

Package / Case :

PowerPAK® SO-8 Dual

Max Power Dissipation :

1.4W

Time@Peak Reflow Temperature-Max (s) :

30

Lead Free :

Lead Free

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Mount :

Surface Mount

Number of Pins :

8

Continuous Drain Current (ID) :

9.7A

FET Type :

2 N-Channel (Dual)

Operating Mode :

ENHANCEMENT MODE

Pulsed Drain Current-Max (IDM) :

40A

Pbfree Code :

yes

Peak Reflow Temperature (Cel) :

260

Terminal Finish :

PURE MATTE TIN

Rise Time :

12ns

Drain to Source Breakdown Voltage :

60V

Transistor Element Material :

SILICON

Turn-Off Delay Time :

60 ns

Mounting Type :

Surface Mount

Rds On (Max) @ Id, Vgs :

21m Ω @ 9.7A, 10V

Vgs(th) (Max) @ Id :

3V @ 250µA

Turn On Delay Time :

12 ns

Nominal Vgs :

3 V

Number of Elements :

2

Width :

5.89mm

Series :

TrenchFET®

Height :

1.04mm

Resistance :

21mOhm

Current - Continuous Drain (Id) @ 25°C :

6.2A

Gate Charge (Qg) (Max) @ Vgs :

75nC @ 10V

Radiation Hardening :

No

Case Connection :

DRAIN

ECCN Code :

EAR99

Pin Count :

8

Base Part Number :

SI7960

Weight :

506.605978mg

JESD-609 Code :

e3

Power Dissipation :

1.4W

Number of Channels :

2

Fall Time (Typ) :

12 ns

Operating Temperature :

-55°C~150°C TJ

FET Feature :

Logic Level Gate