FDPC5030SG

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Mfr.Part #
FDPC5030SG
Manufacturer
onsemi
Package / Case
8-PowerWDFN
Datasheet
Download
Description
MOSFET 2N-CH 30V PWRCLIP56
Stock
6,246
In Stock :
6,246

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Manufacturer :
onsemi
Product Category :
Transistors - FETs, MOSFETs - Arrays
Weight :
207.7333mg
FET Feature :
Standard
Published :
2017
Packaging :
Tape and Reel (TR)
Mounting Type :
Surface Mount
Series :
PowerTrench®
Current - Continuous Drain (Id) @ 25°C :
17A 25A
Input Capacitance (Ciss) (Max) @ Vds :
1715pF @ 15V
Time@Peak Reflow Temperature-Max (s) :
NOT SPECIFIED
Moisture Sensitivity Level (MSL) :
1 (Unlimited)
JESD-609 Code :
e3
Max Power Dissipation :
1.1W
Drain to Source Voltage (Vdss) :
30V
Lifecycle Status :
ACTIVE (Last Updated: 3 days ago)
Reach Compliance Code :
not_compliant
Number of Pins :
8
Rds On (Max) @ Id, Vgs :
5m Ω @ 17A, 10V
RoHS Status :
ROHS3 Compliant
Peak Reflow Temperature (Cel) :
260
Factory Lead Time :
23 Weeks
ECCN Code :
EAR99
Power - Max :
1W 1.1W
Continuous Drain Current (ID) :
25A
Terminal Finish :
Tin (Sn)
Pbfree Code :
yes
Mount :
Surface Mount
Package / Case :
8-PowerWDFN
Gate Charge (Qg) (Max) @ Vgs :
24nC @ 10V
Vgs(th) (Max) @ Id :
3V @ 250µA
Operating Temperature :
-55°C~150°C TJ
FET Type :
2 N-Channel (Dual) Asymmetrical
Datasheets
FDPC5030SG
Introducing Transistors - FETs, MOSFETs - Arrays onsemi FDPC5030SG from Chip IC,where excellence meets affordability. This product stands out with its Mounting Type:Surface Mount, Number of Pins:8, Package / Case:8-PowerWDFN, Operating Temperature:-55°C~150°C TJ, FDPC5030SG pinout, FDPC5030SG datasheet PDF, FDPC5030SG amp .Beyond Transistors - FETs, MOSFETs - Arrays onsemi FDPC5030SG ,we also offer SSM6N57NU,LF, DMN2004DMK-7, AO4629, Our vast inventory has you covered. Contact us now for immediate solutions.

onsemi FDPC5030SG


FDPC5030SG datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available at

FDPC5030SG         Description

 

  The device includes two specialized N-channel MOSFET in the dual package. The switch node is connected internally to facilitate the placement and wiring of the synchronous step-down converter. The control of MOSFET (Q1) and synchronous FET (Q2) is designed to provide optimal power efficiency.

 


FDPC5030SG      Features

 

Q1 N-Channel

Max. RDS(on) = 5.0 m|? at VGS = 10 V, ID = 17 A

Max. RDS(on) = 6.5 m|? at VGS = 4.5 V, ID = 14 A

Q2 N-Channel

Max. RDS(on) = 2.4 m|? at VGS = 10 V, ID = 25 A

Max. RDS(on) = 3.0 m|? at VGS = 4.5 V, ID = 22 A

Low Inductance Packaging Shortens Rise/Fall Times, Resulting in Lower Switching Losses

MOSFET Integration Enables Optimum Layout for Lower Circuit Inductance and Reduced Switch Node Ringing

RoHS Compliant


FDPC5030SG             Applications


Computing

Communications

General Purpose Point of Load

 





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