MPC850DEVR50BU
- Mfr.Part #
- MPC850DEVR50BU
- Manufacturer
- NXP Semiconductors
- Package / Case
- 256-BBGA
- Datasheet
- Download
- Description
- IC MPU MPC8XX 50MHZ 256BGA
- Stock
- 9,545
- In Stock :
- 9,545
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- Manufacturer :
- NXP Semiconductors
- Product Category :
- Microprocessors
- Height Seated (Max) :
- 2.35mm
- JESD-30 Code :
- S-PBGA-B256
- Supply Voltage-Max (Vsup) :
- 3.465V
- Additional Interfaces :
- HDLC/SDLC, I2C, IrDA, PCMCIA-ATA, TDM, UART/USART
- Boundary Scan :
- yes
- Moisture Sensitivity Level (MSL) :
- 3 (168 Hours)
- Graphics Acceleration :
- No
- Address Bus Width :
- 26
- Supply Voltage :
- 3.3V
- Bit Size :
- 32
- Supply Voltage-Min (Vsup) :
- 3.135V
- Terminal Pitch :
- 1.27mm
- uPs/uCs/Peripheral ICs Type :
- MICROPROCESSOR, RISC
- Base Part Number :
- MPC850
- Operating Temperature :
- 0°C~95°C TA
- Series :
- MPC8xx
- Number of Terminations :
- 256
- RoHS Status :
- ROHS3 Compliant
- Clock Frequency :
- 50MHz
- ECCN Code :
- 3A991.A.2
- Low Power Mode :
- yes
- JESD-609 Code :
- e1
- Surface Mount :
- yes
- Terminal Position :
- BOTTOM
- Time@Peak Reflow Temperature-Max (s) :
- 40
- Co-Processors/DSP :
- Communications; CPM
- Ethernet :
- 10Mbps (1)
- Peak Reflow Temperature (Cel) :
- 260
- Length :
- 23mm
- External Data Bus Width :
- 32
- Format :
- FIXED POINT
- Package / Case :
- 256-BBGA
- Number of Cores/Bus Width :
- 1 Core 32-Bit
- Speed :
- 50MHz
- USB :
- USB 1.x (1)
- RAM Controllers :
- DRAM
- Power Supplies :
- 3.3V
- Voltage - I/O :
- 3.3V
- HTS Code :
- 8542.31.00.01
- Integrated Cache :
- yes
- Terminal Form :
- Ball
- Published :
- 1997
- Packaging :
- Tray
- Terminal Finish :
- Tin/Silver/Copper (Sn/Ag/Cu)
- Datasheets
- MPC850DEVR50BU

1.27mm 3.3V 32-bit Microprocessor MPC8xx Series MPC850 3.3V 256-BBGA
MPC850DEVR50BU Description
The MPC850DEVR50BU PowerQUICC? processor offers a versatile, integrated, low-cost solution for a variety of controller, networking, and communications applications. The MPC850DEVR50BU includes extensive communications and system integration support, simplifies development and accelerates time-to-market, offloads core tasks for increased performance and efficiency, and is backed by strong third-party tool support through Our Design Alliance Program.
MPC850DEVR50BU Features
2-Kbyte Instruction Cache
1-Kbyte Data Cache
Instruction and Data MMUs
Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)
26 External Address Lines
Complete Static Design (0-66 MHz Operation)
Memory Controller (Eight Banks)
General-Purpose Timers
System Integration Unit (SIU)
MPC850DEVR50BU Applications
Automotive
Hybrid, electric & powertrain systems
Industrial
Test & Measurement
Enterprise systems
Enterprise projectors
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