EP2S30F484C4

Manufacturer :

Altera (Intel)

Product Category :

FPGAs (Field Programmable Gate Array)

JESD-609 Code :

e1

Peak Reflow Temperature (Cel) :

260

Surface Mount :

yes

Number of I/O :

342

Operating Temperature :

0°C~85°C TJ

Number of LABs/CLBs :

1694

Number of Outputs :

334

Terminal Position :

BOTTOM

Width :

23mm

Combinatorial Delay of a CLB-Max :

5.117 ns

Number of Inputs :

342

Mounting Type :

Surface Mount

Factory Lead Time :

8 Weeks

Organization :

13552 CLBS

Total RAM Bits :

1369728

Number of CLBs :

13552

Terminal Form :

Ball

Terminal Pitch :

1mm

Power Supplies :

1.21.5/3.33.3V

Number of Terminations :

484

Qualification Status :

Not Qualified

Time@Peak Reflow Temperature-Max (s) :

40

Moisture Sensitivity Level (MSL) :

3 (168 Hours)

Number of Logic Elements/Cells :

33880

Programmable Logic Type :

FIELD PROGRAMMABLE GATE ARRAY

Terminal Finish :

Tin/Silver/Copper (Sn/Ag/Cu)

RoHS Status :

RoHS Compliant

Voltage - Supply :

1.15V~1.25V

Supply Voltage :

1.2V

Package / Case :

484-BBGA

JESD-30 Code :

S-PBGA-B484

HTS Code :

8542.39.00.01

Clock Frequency :

717MHz

ECCN Code :

3A991

Height Seated (Max) :

3.5mm

Base Part Number :

EP2S30

Packaging :

Tray

Length :

23mm

Series :

Stratix® II