EP2S30F484C3

Manufacturer :

Altera (Intel)

Product Category :

FPGAs (Field Programmable Gate Array)

Terminal Position :

BOTTOM

Width :

23mm

HTS Code :

8542.39.00.01

Number of Terminations :

484

JESD-609 Code :

e1

Number of LABs/CLBs :

1694

Total RAM Bits :

1369728

Mounting Type :

Surface Mount

Peak Reflow Temperature (Cel) :

260

Combinatorial Delay of a CLB-Max :

4.45 ns

Number of CLBs :

13552

Length :

23mm

Number of Logic Elements/Cells :

33880

Organization :

13552 CLBS

Number of Outputs :

334

Power Supplies :

1.21.5/3.33.3V

Qualification Status :

Not Qualified

Height Seated (Max) :

3.5mm

Clock Frequency :

717MHz

Series :

Stratix® II

Packaging :

Tray

Voltage - Supply :

1.15V~1.25V

Number of Inputs :

342

Base Part Number :

EP2S30

Operating Temperature :

0°C~85°C TJ

RoHS Status :

RoHS Compliant

Terminal Pitch :

1mm

Programmable Logic Type :

FIELD PROGRAMMABLE GATE ARRAY

Factory Lead Time :

8 Weeks

Terminal Form :

Ball

Surface Mount :

yes

Terminal Finish :

Tin/Silver/Copper (Sn/Ag/Cu)

ECCN Code :

3A991

Moisture Sensitivity Level (MSL) :

3 (168 Hours)

Time@Peak Reflow Temperature-Max (s) :

40

Supply Voltage :

1.2V

Package / Case :

484-BBGA

JESD-30 Code :

S-PBGA-B484

Number of I/O :

342