74LVT10DB,118

Manufacturer :

NXP Semiconductors

Product Category :

Gates and Inverters

Propagation Delay (tpd) :

4.4 ns

Load Capacitance :

50pF

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Voltage - Supply :

2.7V~3.6V

Terminal Position :

Dual

JESD-609 Code :

e4

Surface Mount :

yes

Height Seated (Max) :

2mm

Time@Peak Reflow Temperature-Max (s) :

30

Pin Count :

14

Number of Inputs :

3

Operating Temperature :

-40°C~85°C

Terminal Pitch :

0.65mm

Logic Level - Low :

0.8V

Current - Output High, Low :

20mA 32mA

Terminal Finish :

Nickel/Palladium/Gold (Ni/Pd/Au)

Number of Functions :

3

JESD-30 Code :

R-PDSO-G14

Mounting Type :

Surface Mount

Package / Case :

14-SSOP (0.209, 5.30mm Width)

Length :

6.2mm

Base Part Number :

74LVT10

Power Supply Current-Max (ICC) :

2mA

RoHS Status :

ROHS3 Compliant

Family :

LVT

Peak Reflow Temperature (Cel) :

260

Packaging :

Tape and Reel (TR)

Number of Circuits :

3

Packing Method :

Tape and Reel

Series :

74LVT

Number of Terminations :

14

Qualification Status :

Not Qualified

Terminal Form :

Gull wing

Prop. Delay@Nom-Sup :

5.2 ns

Supply Voltage :

3.3V

Schmitt Trigger :

No

Supply Voltage-Min (Vsup) :

2.7V

Logic Type :

NAND Gate

Max Propagation Delay @ V, Max CL :

3.8ns @ 3.3V, 50pF

Logic Level - High :

2V