MPC855TVR50D4
- Mfr.Part #
- MPC855TVR50D4
- Manufacturer
- NXP Semiconductors
- Package / Case
- 357-BBGA
- Datasheet
- Download
- Description
- POWERQUICC 32 BIT POWER ARCHITEC
- Stock
- 805
- In Stock :
- 805
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- Manufacturer :
- NXP Semiconductors
- Product Category :
- Microprocessors
- Speed :
- 50MHz
- Published :
- 1997
- Power Supplies :
- 3.3V
- uPs/uCs/Peripheral ICs Type :
- MICROPROCESSOR, RISC
- Clock Frequency :
- 50MHz
- Boundary Scan :
- yes
- HTS Code :
- 8542.31.00.01
- Moisture Sensitivity Level (MSL) :
- 3 (168 Hours)
- Terminal Finish :
- TIN SILVER COPPER
- Integrated Cache :
- yes
- Supply Voltage-Max (Vsup) :
- 3.465V
- Graphics Acceleration :
- No
- JESD-609 Code :
- e1
- Ethernet :
- 10Mbps (1), 10/100Mbps (1)
- Number of Cores/Bus Width :
- 1 Core 32-Bit
- Bit Size :
- 32
- Co-Processors/DSP :
- Communications; CPM
- Voltage - I/O :
- 3.3V
- Surface Mount :
- yes
- Package / Case :
- 357-BBGA
- Base Part Number :
- MPC855
- Supply Voltage-Min (Vsup) :
- 3.135V
- Address Bus Width :
- 32
- Time@Peak Reflow Temperature-Max (s) :
- 30
- ECCN Code :
- 3A991.A.2
- Terminal Position :
- BOTTOM
- Length :
- 25mm
- Height Seated (Max) :
- 2.52mm
- Terminal Form :
- Ball
- Packaging :
- Tray
- Format :
- FIXED POINT
- Factory Lead Time :
- 8 Weeks
- JESD-30 Code :
- S-PBGA-B357
- Supply Voltage :
- 3.3V
- Terminal Pitch :
- 1.27mm
- Number of Terminations :
- 357
- Series :
- MPC8xx
- RAM Controllers :
- DRAM
- External Data Bus Width :
- 32
- Additional Interfaces :
- CAN, I2C, IrDA, LIN, SCI, SDHC, SPI, UART/USART
- Operating Temperature :
- 0°C~95°C TA
- Low Power Mode :
- yes
- RoHS Status :
- ROHS3 Compliant
- Peak Reflow Temperature (Cel) :
- 245
- Datasheets
- MPC855TVR50D4

1.27mm 3.3V 32-bit Microprocessor MPC8xx Series MPC855 3.3V 357-BBGA
MPC855TVR50D4 Description
The MPC855TVR50D4 Quad Integrated Communications Controller (PowerQUICC?)is a versatile one-chip integrated microprocessor and peripheral combination designed for a variety of controller applications. It particularly excels in both communications and networking systems. The PowerQUICC unit is referred to as the MPC860 in this manual. The MPC855TVR50D4 is a derivative of Motorola’s MC68360 Quad Integrated Communications Controller (QUICC?), referred to here as the QUICC, that implements the PowerPC architecture.
MPC855TVR50D4 Features
Embedded single-issue, 32-bit MPC8xx core (implementing the PowerPC architecture) with thirty-two 32-bit general-purpose registers (GPRs)
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
Operates at up to 80 MHz
General-purpose timers - Four 16-bit timers or two 32-bit timers
ATM support compliant with ATM Forum UNI 4.0 specification
MPC855TVR50D4 Applications
Industrial
Power delivery
Enterprise systems
Enterprise machine
Personal electronics
Tablets
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