74LVT10D,118

Manufacturer :

NXP Semiconductors

Product Category :

Gates and Inverters

Max Propagation Delay @ V, Max CL :

3.8ns @ 3.3V, 50pF

Voltage - Supply :

2.7V~3.6V

Terminal Pitch :

1.27mm

Supply Voltage-Min (Vsup) :

2.7V

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Number of Circuits :

3

Number of Inputs :

3

Packaging :

Tape and Reel (TR)

Logic Level - Low :

0.8V

Logic Level - High :

2V

Load Capacitance :

50pF

Height Seated (Max) :

1.75mm

Qualification Status :

Not Qualified

Number of Functions :

3

Propagation Delay (tpd) :

4.4 ns

Logic Type :

NAND Gate

JESD-609 Code :

e4

Family :

LVT

Terminal Position :

Dual

JESD-30 Code :

R-PDSO-G14

Packing Method :

Tape and Reel

Terminal Finish :

Nickel/Palladium/Gold (Ni/Pd/Au)

RoHS Status :

ROHS3 Compliant

Peak Reflow Temperature (Cel) :

260

Power Supply Current-Max (ICC) :

2mA

Supply Voltage :

3.3V

Schmitt Trigger :

No

Base Part Number :

74LVT10

Package / Case :

14-SOIC (0.154, 3.90mm Width)

Current - Output High, Low :

20mA 32mA

Pin Count :

14

Terminal Form :

Gull wing

Length :

8.65mm

Series :

74LVT

Operating Temperature :

-40°C~85°C

Number of Terminations :

14

Mounting Type :

Surface Mount

Time@Peak Reflow Temperature-Max (s) :

30

Surface Mount :

yes

Prop. Delay@Nom-Sup :

5.2 ns