74LV573N,112

Manufacturer :

NXP Semiconductors

Product Category :

Latches

Qualification Status :

Not Qualified

Package / Case :

20-DIP (0.300, 7.62mm)

Supply Voltage-Min (Vsup) :

1V

Supply Voltage-Max (Vsup) :

5.5V

Prop. Delay@Nom-Sup :

29 ns

Power Supplies :

3.3V

Load Capacitance :

50pF

Family :

LV/LV-A/LVX/H

Voltage - Supply :

1V~5.5V

Surface Mount :

No

RoHS Status :

ROHS3 Compliant

Pin Count :

20

Number of Ports :

2

Series :

74LV

Additional Feature :

BROADSIDE VERSION OF 373

Current - Output High, Low :

16mA 16mA

Length :

26.73mm

Operating Temperature :

-40°C~125°C

Independent Circuits :

1

JESD-609 Code :

e4

Width :

7.62mm

Terminal Pitch :

2.54mm

Circuit :

8:8

Number of Functions :

1

Terminal Position :

Dual

Delay Time - Propagation :

24ns

Max I(ol) :

0.008 A

Height Seated (Max) :

4.2mm

Published :

2009

Output Type :

Tri-State

JESD-30 Code :

R-PDIP-T20

Packaging :

Tube

Time@Peak Reflow Temperature-Max (s) :

30

Terminal Finish :

Nickel/Palladium/Gold (Ni/Pd/Au)

Peak Reflow Temperature (Cel) :

260

Number of Bits :

8

Base Part Number :

74LV573

Supply Voltage :

3.3V

Number of Terminations :

20

Logic Type :

D-Type Transparent Latch

Mounting Type :

Through Hole

Output Polarity :

TRUE

Output Characteristics :

3-STATE

Moisture Sensitivity Level (MSL) :

1 (Unlimited)