74LV573D,112

Manufacturer :

NXP Semiconductors

Product Category :

Latches

Family :

LV/LV-A/LVX/H

Output Type :

Tri-State

Supply Voltage-Min (Vsup) :

1V

Output Polarity :

TRUE

JESD-609 Code :

e4

Published :

2009

Width :

7.5mm

Supply Voltage :

3.3V

Number of Bits :

8

Circuit :

8:8

Independent Circuits :

1

Surface Mount :

yes

Terminal Finish :

Nickel/Palladium/Gold (Ni/Pd/Au)

Series :

74LV

Package / Case :

20-SOIC (0.295, 7.50mm Width)

Packaging :

Tube

Max I(ol) :

0.008 A

Qualification Status :

Not Qualified

Power Supplies :

3.3V

Time@Peak Reflow Temperature-Max (s) :

30

Prop. Delay@Nom-Sup :

29 ns

Voltage - Supply :

1V~5.5V

Base Part Number :

74LV573

Output Characteristics :

3-STATE

Height Seated (Max) :

2.65mm

Additional Feature :

BROADSIDE VERSION OF 373

JESD-30 Code :

R-PDSO-G20

RoHS Status :

ROHS3 Compliant

Operating Temperature :

-40°C~125°C

Number of Terminations :

20

Logic Type :

D-Type Transparent Latch

Load Capacitance :

50pF

Current - Output High, Low :

16mA 16mA

Peak Reflow Temperature (Cel) :

260

Supply Voltage-Max (Vsup) :

5.5V

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Number of Functions :

1

Terminal Form :

Gull wing

Mounting Type :

Surface Mount

Terminal Position :

Dual

Pin Count :

20

Number of Ports :

2

Delay Time - Propagation :

24ns