74LV14N,112

Manufacturer :

NXP Semiconductors

Product Category :

Gates and Inverters

Package / Case :

14-DIP (0.300, 7.62mm)

Length :

19.025mm

Number of Circuits :

6

Supply Voltage-Min (Vsup) :

1V

Power Supplies :

3.3V

Current - Output High, Low :

12mA 12mA

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Number of Terminations :

14

Feature :

Schmitt Trigger

Series :

74LV

JESD-30 Code :

R-PDIP-T14

Published :

2010

Number of Inputs :

1

Voltage - Supply :

1V~5.5V

Pin Count :

14

Current - Quiescent (Max) :

40μA

Terminal Finish :

NICKEL PALLADIUM GOLD

Height Seated (Max) :

4.2mm

Mounting Type :

Through Hole

Time@Peak Reflow Temperature-Max (s) :

30

Schmitt Trigger :

yes

Max Propagation Delay @ V, Max CL :

15ns @ 3.3V, 50pF

Supply Voltage :

3.3V

Load Capacitance :

50pF

Terminal Pitch :

2.54mm

Supply Voltage-Max (Vsup) :

5.5V

Prop. Delay@Nom-Sup :

28 ns

Propagation Delay (tpd) :

48 ns

Logic Type :

Inverter

Family :

LV/LV-A/LVX/H

Number of Functions :

6

Logic Level - Low :

0.3V ~ 1.1V

Operating Temperature :

-40°C~125°C

Base Part Number :

74LV14

Surface Mount :

No

Logic Level - High :

1.4V ~ 3.85V

RoHS Status :

ROHS3 Compliant

JESD-609 Code :

e4

Qualification Status :

Not Qualified

HTS Code :

8542.39.00.01

Peak Reflow Temperature (Cel) :

260

Terminal Position :

Dual

Packaging :

Tube