74AUP1G08GX,125

Manufacturer :

NXP Semiconductors

Product Category :

Gates and Inverters

Logic Type :

AND Gate

JESD-30 Code :

S-PDSO-N5

Height Seated (Max) :

0.35mm

Number of Functions :

1

Packaging :

Tape and Reel (TR)

Pin Count :

5

Terminal Finish :

Tin (Sn)

Number of Inputs :

2

Supply Voltage-Max (Vsup) :

3.6V

Number of Terminations :

5

Length :

0.8mm

Package / Case :

4-XFDFN Exposed Pad

JESD-609 Code :

e3

Number of Circuits :

1

Terminal Pitch :

0.48mm

Logic Level - High :

1.6V ~ 2V

Family :

AUP/ULP/V

Factory Lead Time :

13 Weeks

Terminal Form :

NO LEAD

Quiescent Current :

500nA

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Width :

0.8mm

Terminal Position :

Dual

Series :

74AUP

Base Part Number :

74AUP1G08

Voltage - Supply :

0.8V~3.6V

Supply Voltage :

1.1V

Mounting Type :

Surface Mount

Logic Level - Low :

0.7V ~ 0.9V

Max Propagation Delay @ V, Max CL :

6.2ns @ 3.3V, 30pF

Logic Function :

AND

Operating Temperature :

-40°C~125°C

RoHS Status :

ROHS3 Compliant

Mount :

Surface Mount

Current - Output High, Low :

4mA 4mA

Supply Voltage-Min (Vsup) :

0.8V