ISPLSI 2096E-135LQ128
- Mfr.Part #
- ISPLSI 2096E-135LQ128
- Manufacturer
- Lattice Semiconductor
- Package / Case
- 128-BQFP
- Datasheet
- Download
- Description
- IC CPLD 96MC 7.5NS 128QFP
- Stock
- 48,790
- In Stock :
- 48,790
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- Manufacturer :
- Lattice Semiconductor
- Product Category :
- CPLDs (Complex Programmable Logic Devices)
- Peak Reflow Temperature (Cel) :
- 225
- Terminal Position :
- QUAD
- Package / Case :
- 128-BQFP
- JESD-30 Code :
- S-PQFP-G128
- Propagation Delay :
- 7.5 ns
- Number of Logic Elements/Blocks :
- 24
- Number of Gates :
- 4000
- Power Supplies :
- 3.3/55V
- Series :
- ispLSI® 2000E
- Clock Frequency :
- 100MHz
- Moisture Sensitivity Level (MSL) :
- 3 (168 Hours)
- Supply Voltage :
- 5V
- ECCN Code :
- EAR99
- Supply Voltage-Min (Vsup) :
- 4.75V
- Pbfree Code :
- No
- Height Seated (Max) :
- 4.1mm
- Additional Feature :
- CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
- Qualification Status :
- Not Qualified
- HTS Code :
- 8542.39.00.01
- Supply Voltage-Max (Vsup) :
- 5.25V
- Programmable Type :
- In System Programmable
- Published :
- 2000
- Terminal Form :
- Gull wing
- Terminal Pitch :
- 0.8mm
- JESD-609 Code :
- e0
- Number of Dedicated Inputs :
- 3
- Terminal Finish :
- Tin/Lead (Sn/Pb)
- Pin Count :
- 128
- Number of Macro Cells :
- 96
- Time@Peak Reflow Temperature-Max (s) :
- 30
- Operating Temperature :
- 0°C~70°C TA
- Width :
- 28mm
- Number of Terminations :
- 128
- Length :
- 28mm
- Packaging :
- Tray
- Mounting Type :
- Surface Mount
- Number of I/O :
- 96
- Delay Time tpd(1) Max :
- 7.5ns
- Output Function :
- MACROCELL
- RoHS Status :
- Non-RoHS Compliant
- Surface Mount :
- yes
- Base Part Number :
- ISPLSI 2096
- JTAG BST :
- No
- Voltage Supply - Internal :
- 4.75V~5.25V
- Datasheets
- ISPLSI 2096E-135LQ128
3.3/55V 0.8mm PMIC ispLSI® 2000E Series ISPLSI 2096 5V 128-BQFP
ISPLSI 2096E-135LQ128 Overview
There are 96 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].The device is programmed with 96 I/Os.Devices are programmed with terminations of 128.This electrical part has a terminal position of QUAD, which serves as an important point of access for passengers and freight.The power supply voltage is 5V.Tray is the packaging method.To ensure reliability, the device operates at a temperature of 0°C~70°C TA.It is recommended that the chip be mounted by Surface Mount.As part of the ispLSI® 2000E series, it is a type of FPGA.128 pins are programmed on the chip.This device is also capable of displaying CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.In accordance with the ISPLSI 2096, its related parts are listed.As a building block for digital circuits, there are 4000 gates.A total of 24 logic elements/blocks are present.There is 3.3/55V power supply available for it.5.25V is the maximum supply voltage (Vsup).Input signals are detected using 3 dedicated inputs.In order to operate properly, the supply voltage (Vsup) should be greater than 4.75V.It should not exceed 100MHz in terms of clockfrequency.
ISPLSI 2096E-135LQ128 Features
128-BQFP package
96 I/Os
The operating temperature of 0°C~70°C TA
128 pin count
3.3/55V power supplies
ISPLSI 2096E-135LQ128 Applications
There are a lot of Lattice Semiconductor Corporation
ISPLSI 2096E-135LQ128 CPLDs applications.
- Timing control
- Interface bridging
- I/O expansion
- Discrete logic functions
- Bootloaders for FPGAs
- Address decoders
- Custom state machines
- Digital systems
- Portable digital devices
- Handheld digital devices
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