74LVT10PW,118

Manufacturer :

NXP Semiconductors

Product Category :

Gates and Inverters

Base Part Number :

74LVT10

Packaging :

Tape and Reel (TR)

Terminal Finish :

NICKEL PALLADIUM GOLD

JESD-30 Code :

R-PDSO-G14

Peak Reflow Temperature (Cel) :

260

Power Supply Current-Max (ICC) :

2mA

Mounting Type :

Surface Mount

Voltage - Supply :

2.7V~3.6V

Height Seated (Max) :

1.1mm

Supply Voltage :

3.3V

Package / Case :

14-TSSOP (0.173, 4.40mm Width)

Logic Type :

NAND Gate

Schmitt Trigger :

No

Number of Inputs :

3

Time@Peak Reflow Temperature-Max (s) :

30

Current - Output High, Low :

20mA 32mA

Prop. Delay@Nom-Sup :

5.2 ns

Series :

74LVT

Family :

LVT

Number of Terminations :

14

JESD-609 Code :

e4

Load Capacitance :

50pF

Number of Functions :

3

Operating Temperature :

-40°C~85°C

RoHS Status :

ROHS3 Compliant

Surface Mount :

yes

Number of Circuits :

3

Terminal Pitch :

0.65mm

Logic Level - High :

2V

Qualification Status :

Not Qualified

Supply Voltage-Min (Vsup) :

2.7V

Moisture Sensitivity Level (MSL) :

1 (Unlimited)

Pin Count :

14

Terminal Position :

Dual

Terminal Form :

Gull wing

Max Propagation Delay @ V, Max CL :

3.8ns @ 3.3V, 50pF

Width :

4.4mm

Logic Level - Low :

0.8V

Propagation Delay (tpd) :

4.4 ns

Packing Method :

Tape and Reel

Length :

5mm